2.5D is being constrained upstream, and 3D requires hundreds of millions in advance funding. In the next two years, the valuation anchor of Shenghe Jingwei is no longer in its own hands.
Author: Hu Hao
As Moore's Law and chip processes approach physical limits, the shrinking of transistors becomes increasingly expensive and challenging, the industry focus is beginning to shift to advanced packaging—enabling multiple chips to work together efficiently within a single package.
As a result, packaging is no longer just a "packaging" step after chip manufacturing, but increasingly becomes a key link that determines system performance. For example, 2.5D packaging interconnects multiple chips horizontally through a silicon interposer, enabling high-bandwidth data transmission; 3D packaging takes it a step further by vertically stacking chips, pursuing shorter interconnect distances and higher integration density.
Especially in cutting-edge fields like AI accelerators, high-performance computing, and HBM storage, without advanced packaging capabilities, even the best chip designs are difficult to realize their intended performance. Domestic advanced packaging and testing company Shenghe Jingwei stands at the intersection of this race.
From a business perspective, Shenghe Jingwei initially started with a 12-inch bumping processing business, which is the "front-end" process of advanced packaging, providing micro bumps for external connections. Subsequently, the company continued to extend along the technology chain, gradually building platform capabilities covering bump processing, wafer-level chip scale packaging (WLCSP), 2.5D silicon interposer processing, and multi-chip system integration packaging (2.5D/3DIC).
By 2022, Shenghe was still a company reliant on bump processing and wafer-level packaging for its primary revenue source. The revenue from its 2.5D chiplet multi-chip integration packaging business was only 86 million yuan, accounting for merely 5.32% of its main revenue. At that time, it resembled a specialty process foundry serving diverse downstream demands, with a relatively dispersed customer structure, where the largest customer accounted for around 40% of its revenue.
By 2025, the aforementioned proportions at Shenghe had completely reversed, with revenue from its 2.5D chiplet multi-chip integration packaging business reaching 3.328 billion yuan, accounting for over 50% of its main revenue. At the same time, the company's financial situation underwent a qualitative change, achieving a total revenue of 6.521 billion yuan and a net profit of 922 million yuan, completely leaving behind the loss of 329 million yuan in 2022, with a three-year CAGR of nearly 70%. Even in 2025, when numbers were already elevated, the revenue growth rate was still close to 39%.
However, in the first half of 2026, Shenghe's growth rate began to noticeably decline, with revenue and net profit growth rates dropping to 7.2% and 3.3% respectively. Given the current high demand for advanced packaging, Shenghe, which occupies about 85% of the domestic 2.5D integration market share (based on data from Zhenzhong Consulting calculated according to industry revenue in 2024), left the market puzzled.
In response, the company stated that the slowdown in growth was not due to a weakening demand side, but mainly because of last year's large-scale mass production of the 2.5D production line, high base numbers, and fluctuations in order rhythm.
In fact, a company that once focused on bump processing completed a leap to a Chiplet/2.5D/3D integration platform within three years. This leap may not entirely stem from the company's proactive or incremental product line expansion but is part of a strategic shift throughout the domestic industrial chain and supply chain. This means that Shenghe’s explanation for the decline in performance growth may not be entirely sufficient.
The massive demand from generative AI for GPUs, AI accelerator chips, and HBM high-bandwidth storage makes 2.5D/3D packaging's core application scenario—HBM—necessary to achieve near-storage computing with logic chips through a silicon interposer. CoWoS-type packaging solutions have almost become standard for high-end AI chips.
As global computing chip manufacturers are scrambling to order TSMC’s CoWoS capacity, the window for domestic substitution is also opening simultaneously. Its prospectus clearly indicates that high-performance chip design companies are increasingly inclined to use domestic suppliers' advanced packaging capabilities for supply chain safety and stability considerations.
Shenghe, as one of the few domestic companies capable of 2.5D mass production and having formed a complete chain for processing interposers and micro bumps, stands directly at the forefront of this wave of demand. Its growth comes not only from the expansion of the global AI packaging market but also from the reconstruction of the domestic industrial chain. When customers need to find a foundry that is outside of the TSMC system but can accept high-performance computing packaging orders, the range of alternatives is very limited, thus highlighting Shenghe Jingwei's scarcity.
But this also again highlights the market's confusion, raising the question of what exactly caused Shenghe's significant decline in growth in the first half of 2026?
The Dilemma of Shenghe's 2.5D: "Has Capacity, Lacks Materials."
According to this year's Shenghe's prospectus, among its chiplet multi-chip integration packaging business, what has achieved large-scale mass production is the 2.5D integration of the SmartPoser-Si technology platform, while the 3D Package business of SmartPoser-PoP belongs to large-scale production; other 3D integration technologies are still in the validation and small-scale trial production stage.
Therefore, it can be roughly inferred that at this stage, most of Shenghe's revenue from the chiplet multi-chip integration packaging business comes from the 2.5D integration business.
Shenghe has almost no competitors in the domestic 2.5D market. According to Zhenzhong Consulting’s estimate, its market share in domestic 2.5D will be 85% in 2024, and about 8% globally, ranking just after TSMC, Intel, and Samsung.
Its technology brand, SmartPoser-Si platform, has achieved large-scale production, with micro bump pitch reaching 20 microns, and large silicon interposers can achieve about three times the photomask. In terms of silicon through-silicon via (TSV) interposer processing and 2.5D integration, horizontally compared, it is indeed at the forefront in the domestic market.
However, looking vertically, Shenghe's 2.5D integration business in the first half of 2026 did not surpass the performance of the first half of 2025.
In financial data, Shenghe's revenue from the chiplet multi-chip integration packaging business in the first half of 2025 was 1.782 billion yuan, with a gross margin of 30.63%; in the first half of 2026, the revenue for this business was 1.828 billion yuan, with a gross margin of 30.86%, indicating essentially stagnant revenue growth.
In terms of specific production and sales figures, in the first half of 2025, Shenghe sold a total of 34,000 packaging units, with a capacity utilization rate of 63.42%. Combining the aforementioned business revenue to speculate, the capacity utilization rate of Shenghe's multi-chip integration packaging business in the first half of 2026 is likely still around 60%, as this period also involves the increase of fixed assets.
Thus, it can be seen that Shenghe's 2.5D integration business is still in a phase of idle capacity utilization, yet the company's assertions indicate that the market is very tight, and it is in a state of "full capacity."
This statement seems contradictory but is logical; the key is that Shenghe's actual capacity is not fully utilized, yet the orders it has received on the demand side are already maxed out. In other words, Shenghe does not lack equipment or capacity but lacks sufficient supply materials, leading to a high proportion of idle capacity utilization.
The upstream supply materials referred to here are actually HBM and high-end TSV interposers, as 2.5D integration requires placing logic chips and multiple HBM chips side by side on silicon interposers, through bumping, mounting, encapsulating, testing, and packaging into modules.
Currently, most HBM comes from overseas memory manufacturers, while high-end TSV interposers primarily come from TSMC, Samsung, and Intel's external supply systems. Therefore, domestic or Shenghe's 2.5D production lines are constrained by the tightness of the overseas supply chain.
It is widely believed that the supply tightness of HBM will persist at least until 2028, and the supply looseness of high-end TSV interposers will also occur after 2028. During this period, Shenghe's 2.5D integration business capacity utilization will hardly improve effectively by relying on changes in the overseas supply chain, meaning its revenue and gross margin will still be strongly limited.
Thus, the largest variable affecting Shenghe's 2.5D business performance is the domestic self-supply rate of HBM and high-end TSV interposers.
Regarding HBM, Changxin Technology is the closest domestic solution. The latest news in the industry is that Changxin has begun small-scale production of HBM3E, with plans to expand production in 2027. Currently, domestic chip manufacturers like Cambrian and PingTouGe are conducting matching tests, which, in an optimistic scenario, may lead to product line introduction as early as 2027. However, from a more pessimistic perspective, proving customer certification aside, the stacking layers and yield ramp-up for Changxin HBM3E will face significant challenges, and the effective supply point for domestic HBM may also be postponed.
On TSV interposers, high-end specifications require large sizes, high aspect ratios, and low warpage. One of the companies capable of producing 12-inch TSV interposers domestically is Huajing Semiconductor, but public information is still at the pilot and customer validation stage and has not yet formed stable production capacity to replace overseas high-end sources.
In Shenghe's prospectus, TSV interposers are the main material for packaging, with unit prices in the tens of thousands yuan. Some large customers have switched to supplying materials themselves, increasing the self-supply ratio from 3% in 2023 to about 25% in the first half of 2025. The rise in self-supply materials indicates severe upstream tightness, forcing customers to control their own materials.
Therefore, it can be inferred that at least until 2028, HBM and high-end TSV interposers will continue to be the two key factors limiting Shenghe’s 2.5D integration business performance. During this period, supply tightness is unlikely to see substantial improvement, and Shenghe's capacity utilization will not undergo qualitative enhancements, so this business is likely to continue maintaining a “static” state.
Shenghe's 3D Landscape: Will No Longer Be Dominant
What may drive domestic 3D from concept to production line is not the packaging and testing factories wanting to change routes themselves, but Huawei has already determined the technical path.
At the end of May this year, Huawei’s He Tingbo first publicly discussed the "Tai Law" at ISCAS, which centers around substituting geometric scaling with time scaling. At the beginning of July, he released an engineering detail article, adding the process parameters for logic folding and timelines for the next several generations of Kirin and Ascend.
Logic folding involves disassembling circuits within the same module to be stacked vertically on active layers, relying on wafer-to-wafer hybrid bonding to open up critical paths. The mass production spacing that Kirin aims to achieve in the current (2026) year is about 1.5 microns, with a target clock speed of 3.1 GHz, aiming for below 1 micron by 2027 and a main frequency of 4 GHz around 2029.
The path for Ascend will lag behind, as it will continue using the current mature 2.5D integration scheme until before 2030; afterward, Ascend 990 will be the first to introduce logic folding into AI accelerators. After 2030, it will move HBM, optical interconnects, power supply, etc., from the chip edge to the chip surface.
Currently, Kirin has been tape-out following this path, with this autumn’s smartphone chip being the first complete rollout; however, the logical folding on the computing side will likely not see substantial industry landing actions until 2030, with at least three to four years' waiting time.
The entire supply chain is adapting according to this path, including Shenghe's hundred-billion project in Lingang starting at the end of June this year and Changdian Technology's seventy to eighty billion projects starting in the second half of this year, which is precisely in the context of these capacity moves.
Huawei's Kirin 9050 series (corresponding to the 2026 timeline) implements "time scaling" through a dual-layer vertical stacking method, with its packaging mainly handled by Changdian, thus giving Changdian an early mover advantage in Huawei's supply chain. Meanwhile, Tongfu Microelectronics is the domestic pioneer in 3D stacking, being the earliest supplier for Yangtze Memory's hybrid bonding and stacking, making them an ideal candidate for Huawei's computing packaging. Shenghe is currently the key supplier for Huawei's Ascend 2.5D integration, but it is still in the certification and small batch production phase for 3D integration.
Shenghe's hundred-billion Lingang project is a capital investment currently being made for the company to enter Huawei's logic folding supply chain, securing its future 3D integration business. Of course, the ticket is not cheap and requires upfront payment; before the 3D integration business generates revenue, fixed assets will initially become the company's depreciation costs.
In Shenghe's cost structure, the main components are material costs, labor costs, and production costs, with a rough ratio of 3:2:5. Since the Lingang hundred-billion project will likely not generate large-scale revenue until after 2030, prior to that, the increase in fixed assets from this project will significantly alter the proportion of production costs, placing downward pressure on Shenghe's gross margins.
In the long term, due to the early mover advantages of Changdian and Tongfu, the competitive landscape for Shenghe in the 3D integration field will not be as favorable as the current situation in the 2.5D integration market, which could impact its future market share and business gross margin. Unless Huawei's logic folding supply chain can ignite and diffuse among other domestic chip manufacturers, driving strong domestic substitution demands, but it is still premature to make such judgments.
Thus, Huawei’s ecosystem can only provide Shenghe with a ticket for entry into the 3D field, but will not grant them an exclusive pass for 2.5D. In the long run, Shenghe will obtain a portion of orders aligned with Huawei's logic folding and later generations of Ascend, rather than the entire track.
Shenghe's Current Status: Sandwiched Between 2.5D and 3D with a Valuation of 240 billion
Shenghe's current situation is quite clear; on one side, it has become a domestic leader but is locked by upstream materials in 2.5D; on the other side, it must bear the depreciation upfront, with realization of scale post-2030 in 3D; both lead to a contribution of 3/4 of the revenue coming from customer A.
The current market pricing for Shenghe is about 240 billion yuan, with dynamic PE exceeding 260 times. This price is certainly not based on current profits but rather on Shenghe’s development narrative as an irreplaceable player in domestic advanced packaging.
However, at least until 2028, Shenghe will still face a situation of insufficient utilization of its main business capacity, while the continuous increase in fixed assets brings more depreciation costs, putting pressure on its revenue growth and gross margin levels.
Thus, Shenghe is currently in a "gap" within two capacity cycles.
At this time, the progress of customer A itself and market expectations will become essential components of Shenghe's valuation anchors, with their shipment volume, chip iteration rhythm, and parameter optimization level indirectly influencing Shenghe's valuation expectations. For instance, whether chip iteration requires more silicon interposers and denser bumps or whether Shenghe can keep up with the timelines for 1.5 microns and 1 micron as parameters evolve to folding.
Only when customer A increases its shipment volume can Shenghe's idle 2.5D resources have a chance to be fully utilized, breaking the static state; if customer A only iterates without increasing volume, Shenghe will remain in a state of "having orders but lacking materials"; if customer A allocates folding orders to Changdian or Tongfu, Shenghe's 3D options will depreciate, indicating that the current 240 billion yuan may not be solely priced for Shenghe but is defined by customer A's progress pace.
This largely determines that over the next two years, Shenghe is more suitable to be viewed as an observation sample rather than a growth sample.
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